Manuals
VIPPE user guide (June 2020)
Papers
L. Diaz, E. González, E. Villar, P. Sánchez
VIPPE: Parallel simulation and performance analysis of complex embedded systems.
HiPPES4CogApp: High Performance, Predictable Embedded Systems for Cognitive Application. 2015-01
P. González, Á. Díaz, L. Diaz, P. Sánchez
Profiling and optimizations for Embedded Systems.
ACM-IEEE MEMOCODE14. 2014-10
L. Diaz, E. González, E. Villar, P. Sánchez
VIPPE: Native simulation and performance analysis framework for multi-processing embedded systems.
Proceedings of the JCE-Sarteco 2014. 2014-09
L. Diaz, P. Sánchez
Host-compiled Parallel Simulation of Many-core Embedded Systems.
San Francisco, DAC2014. 2014-06
P. Peñil, L. Diaz, P. Sánchez
Sytem-level design framework for many-core architectures.
Workshop 3PMCES 2014. 2014-03
Project Documents
Last Updates on VIPPE done in the context of the CONTREX Project are reported in different deliverables of CONTREX (D2.3.x, D3.1.x, D3.4.x and D5.3.x)
Presentations
F. Herrera and E.Villar. “Fidelity of native-based performance models for Design Space Exploration” . Presentation at DATE’16 MiFi Workshop.